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Article Issue #5278

PCIe Gen 4 / Gen 5

What to know

PCIe Gen 4 and Gen 5 are successive generations of the Peripheral Component Interconnect Express bus standard, each doubling the per-lane bandwidth of the previous generation; PCIe lanes connect the CPU to expansion slots and M.2 sockets; For AI workstation builders, PCIe Gen 5 GPU slots are increasingly relevant as NVIDIA and AMD GPUs exceed the bandwidth of Gen 4 x16 slots in memory-intensive inference workloads

PCIe Gen 4 / Gen 5, WikiWalls Glossary illustration

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PCIe Gen 4 and Gen 5 are successive generations of the Peripheral Component Interconnect Express bus standard, each doubling the per-lane bandwidth of the previous generation. PCIe Gen 4 delivers 2 GB/s per lane; Gen 5 delivers 4 GB/s per lane, enabling faster SSDs, GPUs, and AI accelerators.

How it works

PCIe lanes connect the CPU to expansion slots and M.2 sockets. An NVMe SSD in an x4 slot uses four lanes: at Gen 4, that provides up to 8 GB/s theoretical bandwidth; at Gen 5, up to 16 GB/s. GPU slots use x16 lanes, providing up to 32 GB/s at Gen 4 and 64 GB/s at Gen 5 for GPU-to-CPU data transfer.

Key facts

  • Backward compatible: PCIe is backward and forward compatible; a Gen 5 device in a Gen 4 slot runs at Gen 4 speeds
  • Gen 5 SSDs: PCIe Gen 5 NVMe SSDs achieve up to 14,000 MB/s sequential read but require robust cooling due to controller heat
  • Lane allocation: CPUs have a finite number of PCIe lanes; populating multiple high-bandwidth devices can require sharing or bifurcation

For builders

For AI workstation builders, PCIe Gen 5 GPU slots are increasingly relevant as NVIDIA and AMD GPUs exceed the bandwidth of Gen 4 x16 slots in memory-intensive inference workloads. For NVMe SSDs, Gen 5 benefits are more marginal for typical developer workflows.

Sources

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